MA320002【PDF 79/208 页】MODULE PLUG-IN PIC32 USB OTG

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TABLE 4-40:

RTCC REGISTERS MAP (1)

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

0200

RTCCON

31:16

15:0

—

ON

—

FRZ

—

SIDL

—

—

—

—

—

—

—

—

RTSECSEL RTCCLKON

CAL<11:0>

— —

RTCWREN RTCSYNC HALFSEC

RTCOE

0000

0000

0210

RTCALRM

31:16

15:0

—

ALRMEN

—

CHIME

—

PIV

—

ALRMSYNC

—

— —

AMASK<3:0>

—

—

—

—

— —

ARPT<7:0>

—

—

—

0000

0000

0220

0230

RTCTIME

RTCDATE

31:16

15:0

31:16

15:0

HR10<3:0>

SEC10<3:0>

YEAR10<3:0>

DAY10<3:0>

HR01<3:0>

SEC01<3:0>

YEAR01<3:0>

DAY01<3:0>

—

—

MIN10<3:0>

— —

MONTH10<3:0>

— —

—

—

—

MIN01<3:0>

— —

MONTH01<3:0>

WDAY01<3:0>

—

xxxx

xx00

xxxx

xx0x

0240 ALRMTIME

31:16

15:0

MIN10<3:0>

SEC10<3:0>

MIN01<3:0>

SEC01<3:0>

—

MIN10<3:0>

— —

—

—

MIN01<3:0>

— —

—

xxxx

xx00

0250 ALRMDATE

31:16 — — — — — — —

15:0 DAY10<3:0> DAY01<3:0>

—

—

MONTH10<3:0>

— —

—

MONTH01<3:0>

WDAY01<3:0>

00xx

xx0x

Legend:

Note 1:

x = unknown value on Reset, — = unimplemented, read as ‘ 0 ’. Reset values are shown in hexadecimal.

All registers in this table have corresponding CLR, SET and INV Registers at their virtual addresses, plus offsets of 0x4, 0x8 and 0xC, respectively. See Section 12.1.1 “CLR, SET and INV Registers” for more

information.

TABLE 4-41:

DEVCFG: DEVICE CONFIGURATION WORD SUMMARY

Bits

31/15

30/14

29/13

28/12

27/11

26/10

25/9

24/8

23/7

22/6

21/5

20/4

19/3

18/2

17/1

16/0

2FF0

DEVCFG3

31:16 — — — — — — —

15:0 USERID15 USERID14 USERID13 USERID12 USERID11 USERID10 USERID9

—

USERID8

—

USERID7

—

USERID6

—

USERID5

—

USERID4

—

USERID3

—

USERID2

—

USERID1

— xxxx

USERID0 xxxx

2FF4

DEVCFG2

31:16 —

15:0 FUPLLEN (1)

—

—

—

—

—

—

—

—

—

—

FUPLLIDIV<2:0> (1)

—

—

—

—

—

FPLLMULT<2:0>

—

—

—

FPLLODIV<2:0>

FPLLIDIV<2:0>

xxxx

xxxx

2FF8

DEVCFG1

31:16

15:0

— —

FCKSM<1:0>

— —

FPBDIV<1:0>

—

—

—

OSCIOFNC

— —

POSCMOD<1:0>

FWDTEN

IESO

—

—

—

FSOSCEN

—

—

WDTPS<4:0>

FNOSC<2:0>

xxxx

xxxx

2FFC DEVCFG0

31:16 — — — CP

15:0 PWP15 PWP14 PWP13 PWP12

—

—

—

—

—

—

BWP

—

—

—

—

—

—

—

—

—

PWP19

ICESEL

PWP18

—

PWP17 PWP16

DEBUG<1:0>

xxxx

xxxx

Legend:

Note 1:

x = unknown value on Reset, — = unimplemented, read as ‘ 0 ’. Reset values are shown in hexadecimal.

These bits are only available on PIC32MX4XX devices.

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